[Zlib-devel] [7/6][RFC V2 Patch] Blackfin implementation

Mike Frysinger vapier at gentoo.org
Sat Apr 2 14:17:39 EDT 2011


On Sat, Apr 2, 2011 at 2:00 PM, Jan Seiffert wrote:
> 2011/4/2 Mike Frysinger:
>> On Sat, Apr 2, 2011 at 1:15 PM, Jan Seiffert wrote:
>>  unfortunately, that isnt what DISALGNEXCPT does :(.  all it does is ignore the low bits of the index
>> register when doing the load.
>
> Thats exactly what i want, like the altivec loads, the only real use
> full mode for memory accesses ;)
> Lower address bits? Totally overrated...
>
> But since i do not know any (instruction) timings, esp. when memory
> access is involved, if you say to me "don't do this because..." I can
> see what i can change.

the stall information on the Blackfin isnt exactly that great.  the
only real paper we have is this:
http://www.analog.com/static/imported-files/application_notes/359755652155613133108374EE197.pdf
(that applies to all Blackfins atm)

nothing in the code really jumped out at me.  the sections with the
dregs reading/writing the same ones will cause stalls (e.g. R2=...;
R2=R2...;), but i dont think there's any real way around that.

>> so if the pointer is like 0x1111, the hardware will turn this into
>> 0x1110 before processing it.
>
> Uhhh, only 1 bit is masked out? I thought it was 2?

that's a hexstring, not a bitstring :)

>> +        "LC1 = %2;\n\t" /* set hw loop counter */
>> +        "%2 = 0;\n\t" /* s1s = 0 */
>> +        "LOOP inner_add LC1;\n\t"
>> +        /*=========================*/
>> +        "LOOP_BEGIN inner_add;\n\t"
>>
>> usually this is done like so:
>> LSETUP (inner_add_start, inner_add_end) LC1 = %2;
>> inner_add_start: ....
>> inner_add_end: ... last insn of the loop ...
>>
>> make sure %2 is a Preg of course.  reloading LB/LT/LC can take a bad
>> cycle penalty when they're done independently.
>
> Hmmm, ok, but a Preg?
> I can't do any arithmetic on them.

right, the math on Pregs is pretty limited.  but you should be able to
do a Preg=Dreg move right before the LSETUP.

>>> Maybe someone has a Blackfin to test it on.
>>
>> the gnu sim should support linux userspace apps.  there is a qemu port
>> too, but the insn coverage with more exotic insns isnt that great.
>>
>> $ echo 'main(){puts("hi");}' | bfin-linux-uclibc-gcc -static -x c - -o a.out
>> $ bfin-linux-uclibc-run --env user ./a.out
>> hi
>>
>> you can even trace the register state on each insn with the
>> -t/--trace-core/--trace-insn options:
>> insn:     0x00221e                       -R6 = P3;
>> reg:      0x00221e                       -wrote R6 = 0x3b48
>> reg:      0x00221e                       -wrote PC = 0x2220
>
> Is there any chance to install it with crossdev?

unfortunately, not atm.  the Blackfin port to gdb isnt in gdb-7.2.
it'll be in the next release (7.3).

i can run it on some hardware monday (i dont have any boards with me
atm).  how are you testing this exactly ?
-mike




More information about the Zlib-devel mailing list